From what I read @
and the following 5 pages it seems like AMD got a major FSB problem. But isn't he (the author) missing something?
Isn't the Hammes CPU supposed to come with a integraded memory-controler that will greatly reduce latancy time and increas the speed of memory access?
Am I all wrong here (or is he)?
and the following 5 pages it seems like AMD got a major FSB problem. But isn't he (the author) missing something?
Isn't the Hammes CPU supposed to come with a integraded memory-controler that will greatly reduce latancy time and increas the speed of memory access?
Am I all wrong here (or is he)?
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