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Is it true?

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  • Is it true?

    From what I read @



    and the following 5 pages it seems like AMD got a major FSB problem. But isn't he (the author) missing something?
    Isn't the Hammes CPU supposed to come with a integraded memory-controler that will greatly reduce latancy time and increas the speed of memory access?

    Am I all wrong here (or is he)?

  • #2
    Well. You are right, I think. He kind of left out that the FSB will be out of the way on the Hammer platforms. The memory bus can supposedly run in any speed the memory can handle. The 'FSB', if you want one, will be the speed of the processor, if I understand it all correctly.

    But I might be wrong, too.. :)

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    • #3
      Here's an interesting link that just might help

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