GA-H55-USB Distribution of PCIe lanes with regards to NEC USB 3.0

[ozeh]

Just checking if my interpretation of the block diagram is correct on GA-H55-USB3 with regards to how Gigabyte have allocated the H55 PCIe lanes and the interesting NEC USB 3 controller.

(r1.0, diagram is literally the same for r2.0, though they used a different RTL PCIe controller)



First up, i believe the H55 has six PCIe 1.1 lanes. From the above I see:

3 lanes dedicated as PCIe x1 slots,
1 lane dedicated as Gigabyte/Jmicron SATA2 chip
1 lane dedicated for Gigabit lan
1 lane dedicated to the switch which in turn goes to the NEC D720200F1 USB 3.0 controller

I noticed the Gen 2 link from the switch which ties in to the PCIe x16 from the CPU.

From what I looked up, Gen 1 (PCIe 1.x) is about 250MB/sec data rate per lane (& per direction), less once you take into account protocol overheads. Gen 2 (PCIe 2.x) is about 500MB/sec with the same caveat.

At a guess, if there is a discrete graphics card installed, does the switch use the (Gen1/PCIe 1.x) x1 lane?

If onboard video is used, does it use the (Gen2/PCIe 2.x) x1 lane?

So basically, for onboard video setups, you have plenty of bandwidth for the USB 3 controller. Whack in a video card, and it will fall back to the PCIe 1.1 x1 lane which is still damn fast at this stage, but technically somewhat bandwidth-limited?

Thanks

[wazza300]

Re: GA-H55-USB Distribution of PCIe lanes with regards to NEC USB 3.0

i dont think it limits the pci bandwidth if your using one graphics card and have onboard graphics disabled,only if your using two graphic cards in sli/xfire it will restrict pci-e bandwidth??

[miahallen]

Re: GA-H55-USB Distribution of PCIe lanes with regards to NEC USB 3.0

Check out my review of Gigabyte's methods of connection here:
USB 3.0 Testing on the Gigabyte UD3R and UD6 | Overclockers

[ozeh]

Re: GA-H55-USB Distribution of PCIe lanes with regards to NEC USB 3.0

Thanks for that miahallen. I see it is very much like that. The only thing is, when it borrows the PCIe Gen 2 lane "turbo", does it just borrow x1 from the x16? what does the graphics card scale down to? x15.. x8?

edit: well, just thought i might update after testing with a video card. when one is installed, CPU-z reports it having the full PCIe x16 lanes, and when windows picks up the video card, it also picks up the USB controller again, this time through the Intel 5 series chipset (if the installing device drivers screen is any indication). Still, a singlePCIe (v1.1) x1 lane should be plenty of bandwidth in this configuration with a video card until we see on-chip USB3 support. but this just confirms the switch literally switches to one or the other.

[miahallen]

Re: GA-H55-USB Distribution of PCIe lanes with regards to NEC USB 3.0

x8 :(