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Man they don't make it easy!
I'm building a new system on a X670E Aorus Master.
I'm trying to figure out if utilizing the "M2A_CPU" M.2 slot will reduce the number of PCIE lanes accessible by the PCIE16x GPU slot.
Anybody know If this board will allow full use of PCIE5.0x16 and PCIE5.0x4 m.2 simultaneously? I believe the answer is yes, but I've not been able to find documentation that explicitly states this.
Thanks
I'm building a new system on a X670E Aorus Master.
I'm trying to figure out if utilizing the "M2A_CPU" M.2 slot will reduce the number of PCIE lanes accessible by the PCIE16x GPU slot.
Anybody know If this board will allow full use of PCIE5.0x16 and PCIE5.0x4 m.2 simultaneously? I believe the answer is yes, but I've not been able to find documentation that explicitly states this.
Thanks